1.   General description
Meets JEDEC Specification 42.4 TSE2002B1, 3 Jun 2009. The NXP Semiconductors
SE97B measures temperature from 40 癈 to +125 癈 with JEDEC Grade B ? 癈
maximum accuracy between +75 癈 and +95 癈 critical zone and also provide 256 bytes
of EEPROM memory communicating via the I
2
C-bus/SMBus. It is typically mounted on a
DDR3 Dual In-Line Memory Module (DIMM) measuring the DRAM temperature in
accordance with the new JEDEC (JC-42.4) Mobile Platform Memory Module Temperature
Sensor Component specification and also replacing the Serial Presence Detect (SPD)
which is used to store memory module and vendor information.
The SE97B thermal sensor and EEPROM operates over the V
DD
range of 3.0 V to 3.6 V.
The TS consists of a 敚 Analog to Digital Converter (ADC) that monitors and updates its
own temperature readings 10 times per second, converts the reading to a digital data, and
latches them into the data temperature register. User-programmable registers, the
specification of upper/lower alarm and critical temperature trip points, EVENT
output
control, and temperature shutdown, provide flexibility for DIMM temperature-sensing
applications.
When the temperature changes beyond the specified boundary limits, the SE97B outputs
an EVENT
signal using an open-drain output that can be pulled up between 0.9 V and
3.6 V. The user has the option of setting the EVENT
output signal polarity as either an
active LOW or active HIGH comparator output for thermostat operation, or as a
temperature event interrupt output for microprocessor-based systems. The EVENT
output
can also be configured as only a critical temperature output.
The EEPROM is designed specifically for DRAM DIMMs SPD. The lower 128 bytes
(address 00h to 7Fh) can be Permanent Write Protected (PWP) or Reversible Write
Protected (RWP) by software. This allows DRAM vendor and product information to be
stored and write protected. The upper 128 bytes (address 80h to FFh) are not write
protected and can be used for general purpose data storage.
The SE97B has a single die for both the temp sensor and EEPROM for higher reliability
and supports the industry-standard 2-wire I
2
C-bus/SMBus serial interface. The SMBus
TIMEOUT function is supported to prevent system lock-ups. Manufacturer and Device ID
registers provide the ability to confirm the identity of the device. Three address pins allow
up to eight devices to be controlled on a single bus.
The SE98B is available as the SE97B thermal sensor only.
SE97B
DDR memory module temp sensor with integrated SPD
Rev. 01 27 January 2010
Product data sheet